Course Code: iriscv
Duration: 7 hours
Prerequisites:

Basic knowledge of C language.

Overview:

The course is an introduction to RISC-V architecture and the microcontrollers based on it. The course may optionally be accompanied by hands-on exercises using GD32VF103 microcontroller and C language or assembly language programming exercises with RARS simulator.

Course Outline:

RISC-V architecture origins. The modular architecture definition – base architectures, extensions. RISC-V ISA – registers, instruction set. Features related to modern software concepts. Overview of RISC-V implementations.
RISC-V system architecture. Exceptions and their handling. CLIC interrupt controller. ECLIC interrupt controller in GD32VF103.

Exercises:
1. GD32VF103 firmware development with VScode.
2. GD32VF103 interrupts.

Sites Published:

Polska - Introduction to RISC-V architecture

Kuwait - Introduction to RISC-V architecture

Oman - Introduction to RISC-V architecture

Slovakia - Introduction to RISC-V architecture

Kenya - Introduction to RISC-V architecture

Nigeria - Introduction to RISC-V architecture

Botswana - Introduction to RISC-V architecture

Slovenia - Introduction to RISC-V architecture

Croatia - Introduction to RISC-V architecture

Serbia - Introduction to RISC-V architecture

Bhutan - Introduction to RISC-V architecture

Nepal - Introduction to RISC-V architecture

Uzbekistan - Introduction to RISC-V architecture